Datasheet for AD9262BCPZ-10:
- Manufacturer Part Number : AD9262BCPZ-10
- Manufacturer : AD
- Description : 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC IC
- Series : AD9262
- Reference Price : USD 38.4
- Our Price : We have a better price, contact us by email
- Product Type : High Speed A/D Converters >10 MSPS
- Function : Standard High Speed A/D Converters >20 MSPS
- Current Suggest : Not Recommended for New Designs
- Status : Production
- ROHS Status : ROHS Compliant (Lead Free)
- Package Type : 64-Lead LFCSP (9mm x 9mm w/ EP)
- Pins : 64
- MFG Package Case : CP-64-4
- Part Type : OTH
- Standard Packing Type : Tray
- Standard Packing Quantity : 260
- Working Temperature : -40 to 85C
- Other Part Number : AD9262BCPZ-10
- Shipping methods : DHL FEDEX UPS TNT
- Delivery Time : Ship within 1 day.
- Manufacturer Production time : 6-8 weeks (Normally have stocks)
- Weight : 0.001KG
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- SNR: 83 dB (85 dBFS) to 10 MHz input
- SFDR: 87 dBc to 10 MHz input
- Noise figure: 15 dB
- Input impedance: 1 kΩ
- Power: 600 mW
- 1.8 V analog supply operation
- 1.8 V to 3.3 V output supply
- Selectable bandwidth
2.5 MHz/5 MHz/10 MHz real
5 MHz/10 MHz/20 MHz complex - Dual channel modulator only version available (AD9267)
- Output data rate: 30 MSPS to
160 MSPS - See data sheet for additional features
The AD9262 has a resistive input impedance that significantlyrelaxes the requirements of the driver amplifier. In addition, a32× oversampled 5th-order continuous time loop filter significantly attenuates out of band signals and aliases, reducing theneed for external filters at the input.
An external clock input or the integrated integer-N PLL providesthe 640 MHz internal clock needed for the oversampledcontinuous time Σ-Δ modulator. On-chip decimation filters andsample rate converters reduce the modulator data rate from 640MSPS to a user-defined output data rate between 30 MSPS to160 MSPS, enabling a more efficient and direct interface.
The AD9262 incorporates an integrated dc correction andquadrature estimation block that corrects for gain and phase mismatch between the two channels. This functional blockproves invaluable in complex signal processing applications such as direct conversion receivers.
The digital output data is presented in offset binary, Gray code,or twos complement format. A data clock output (DCO) isprovided to ensure proper timing with the receiving logic. TheAD9262 has the added feature of interleaving Channel A andChannel B data onto one 16-bit bus, simplifying on-board routing.
The ADC is available in three different bandwidth options of2.5 MHz, 5 MHz, and 10 MHz, and operates on a 1.8 V analogsupply and a 1.8 V to 3.3 V digital supply, consuming 600 mW.The AD9262 is available in a 64-lead LFCSP and is specifiedover the industrial temperature range (−40°C to +85°C).
Product Highlights
- Continuous time Σ-Δ architecture efficiently achieves highdynamic range and wide bandwidth.
- Passive input structure reduces or eliminates the requirementsfor a driver amplifier.
- An oversampling ratio of 32× and high order loop filterprovide excellent alias rejection reducing or eliminating theneed for antialiasing filters.
- An integrated decimation filter, sample rate converter, PLLclock multiplier, and voltage reference provide ease of use.
- Operates from a single 1.8 V analog power supply and1.8 V to 3.3 V output supply.
- A standard serial port interface (SPI) supports variousproduct features and functions.
Applications
- Baseband quadrature receivers: CDMA2000, WCDMA, multicarrier GSM/EDGE, 802.16x, and LTE
- Quadrature sampling instrumentation
- Medical equipment
- Radio detection and ranging (RADAR)
This designates products ADI does not recommend broadly for new designs.