- Manufacturer Part Number : AD9433
- Manufacturer : AD
- Description : 12-Bit 105/125 MSPS Analog-To-Digital IF Sampling Converter
- Series : AD9433
- Reference Price : USD 27.064
- Our Price : We have a better price, contact us by email
- Product Type : High Speed A/D Converters >10 MSPS
- Function : Standard High Speed A/D Converters >20 MSPS
- Current Suggest : Production
- Status : Production
- RoHS Status: -
- Voltage: -
- Feature: -
- Package Case: -
- Temperature Range: -
- Packing: Reel/Tray/Tube
- Standard Packing Quantity: -
- Country of Origin: -
- Other Part Number : AD9433
- Shipping methods : DHL FEDEX UPS TNT
- Delivery Time : Ship within 1 day.
- Manufacturer Production time : 6-8 weeks (Normally have stocks)
- Weight : 0.001KG
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- IF Sampling up to 350 MHz
- SNR: 67.5 dB, fin up to Nyquist at 105 MSPS
- SFDR: 83 dBc, fin = 70 MHz at 105 MSPS
- SFDR = 72 dBc, fin = 150 MHz at 105 MSPS
- 2 Vp-p analog input range
- On-chip clock duty cycle stabilization
- On-chip reference and track-and-hold
- SFDR Optimization Circuit
- Excellent Linearity
DNL = ± 0.25 LSB (Typ)
INL = ± 0.5 LSB (Typ) - 750 MHz full power analog bandwidth
- Power Dissipation = 1.35W at 125 MSPS
- Twos complement or offset binary data format
- See data sheet for additional features
The AD9433 is a 12-bit monolithic sampling analog-to-digital converter with an on-chip track-and-hold circuit and is designed for ease of use. The product operates up to 125 Msps conversion rate and is optimized for outstanding dynamic performance in wideband and high IF carrier systems.
The ADC requires a +5V analog power supply and a differential encode clock for full performance operation. No external reference or driver components are required for many applications. The digital outputs are TTL/CMOS compatible and a separate output power supply pin supports interfacing with 3.3V or 2.5V logic.
A user-selectable, on-chip proprietary circuit optimizes spurious-free dynamic range (SFDR) versus signal-to-noise-and-distortion (SINAD) ratio performance for different input signal frequencies, providing as much as 83 dBc SFDR performance over the dc to 70 MHz band.
The encode clock supports either differential or single-ended input and is PECL-compatible. The output format is user-selectable for binary or two's complement and provides an overrange (OR) signal.
Fabricated on an advanced BiCMOS process, the AD9433 is available in a 52-lead thin quad flat package (TQFP_EP) that is specified over the industrial temperature range of −40°C to +85°C. The AD9433 is pin-compatible with the AD9432.
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.