Datasheet for ADAU1961WBCPZ-RL:
- Manufacturer Part Number : ADAU1961WBCPZ-RL
- Manufacturer : AD
- Description : Automotive Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL IC
- Series : ADAU1961
- Reference Price : USD 1.888
- Our Price : We have a better price, contact us by email
- Product Type : Audio CODECs
- Function : -
- Current Suggest : Production
- Status : Production
- ROHS Status : ROHS Compliant (Lead Free)
- Package Type : 32-Lead LFCSP (5mm x 5mm w/ EP)
- Pins : 32
- MFG Package Case : CP-32-4
- Part Type : REEL
- Standard Packing Type : Reel
- Standard Packing Quantity : 5000
- Working Temperature : -40 to 105C
- Other Part Number : ADAU1961WBCPZ-RL
- Shipping methods : DHL FEDEX UPS TNT
- Delivery Time : Ship within 1 day.
- Manufacturer Production time : 6-8 weeks (Normally have stocks)
- Weight : 0.001KG
Contact us to check the best price and real time inventory quantity for ADAU1961WBCPZ-RL. If you need any more information about ADAU1961WBCPZ-RL, you can also send us by email. Our email is [email protected], we will reply you in 12 hours.
The ADAU1961 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 35 mW from a 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control.
The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1961 includes a stereo digital microphone input.
The ADAU1961 includes five high power output drivers (two differential and three single-ended), supporting stereo head-phones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.
The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz
Applications
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.