The ADV7481 is an integrated video decoder and combinedHDMI®/MHL® receiver. It is targeted at connectivity enabledhead units requiring a wired, uncompressed digital audio/videolink from smartphones and other consumer electronics devicesto support streaming and integration of cloud-basedmultimedia content and applications into an automotiveinfotainment system.

The ADV7481 MHL 2.1 capable receiver supports a maximumpixel clock frequency of 75 MHz, allowing resolutions up to720p/1080i at 60 Hz in 24-bit mode. The ADV7481 features alink control bus (CBUS) that handles the link layer, translationlayer, CBUS electrical discovery, and display data channel(DDC) commands. The implementation of the MHL sidebandchannel (MSC) commands by the system processor can behandled either by the I2C bus, or via a dedicated serialperipheral interface (SPI) bus. A dedicated interrupt pin(INTRQ3) is available to indicate that events related to CBUShave occurred.

The ADV7481 also features an enable pin (VBUS_EN) todynamically enable or disable the output of a voltage regulator,which provides a 5 V voltage bus (VBUS) signal to the MHLsource.

The ADV7481 HDMI capable receiver supports a maximumpixel clock frequency of 162 MHz, allowing HDTV formats upto 1080p, and display resolutions up to UXGA (1600 × 1200 at60 Hz). The device integrates a consumer electronics control(CEC) controller that supports the capability discovery andcontrol (CDC) feature. The HDMI input port has dedicated 5 Vdetect and Hot Plug™ assert pins.

The HDMI/MHL receiver includes an adaptive transitionminimized differential signaling (TMDS) equalizer that ensuresrobust operation of the interface with long cables.

The ADV7481 single receiver port is capable of accepting bothHDMI and MHL electrical signals. Automatic detectionbetween HDMI and MHL is achieved by using cable impedancedetection through the CD_SENSE pin.

The ADV7481 contains a component processor (CP) thatprocesses the video signals from the HDMI/MHL receiver. Itprovides features such as contrast, brightness, and saturationadjustments, as well as free run and timing adjustment controlsfor HS/VS/DE timing.

The ADV7481 analog front end (AFE) comprises a single highspeed, 10-bit analog-to-digital converter (ADC) that digitizesthe analog video signal before applying it to the SDP.

The eight analog video inputs can accept single-ended, pseudodifferential, and fully differential composite video signals, aswell as S-Video and YPbPr video signals, supporting a widerange of consumer and automotive video sources.

Short to battery (STB) events can be detected on differentialinput video signals. STB protection is provided by ac couplingthe input video signals. The ADV7481, in combination with anexternal resistor divider, provides a common-mode input rangeof 4 V, enabling the removal of large signal common-modetransients present on the video lines.

The automatic gain control (AGC) and clamp restore circuitryallow an input video signal up to 1.0 V p-p at the analog videoinput pins of the ADV7481. Alternatively, the AGC and clamprestore circuitry can be bypassed for manual settings.

The SDP of the ADV7481 is capable of decoding a largeselection of analog baseband video signals in composite,S-Video, and component formats. The SDP supports worldwideNTSC, PAL, and SECAM standards.

The ADV7481 features an 8-bit digital input/output port,supporting input and output video resolutions up to 720p/1080iin both the 8-bit interleaved 4:2:2 SDR and DDR modes.

APPLICATIONS

• Portable devices
• Automotive infotainment (head unit and rear seat
  entertainment systems)
• HDMI repeaters and video switches

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.