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Manufacturer / Brand: AD
Details: Ethernet Clock Generator, 10 Clock Outputs IC
Series: AD9571
Quantity Available: Over 79710 pieces

Datasheet for AD9571ACPZPEC:

AD9571ACPZPEC datasheet
Price for AD9571ACPZPEC
Product Parameters
  • Manufacturer Part Number : AD9571ACPZPEC
  • Manufacturer : AD
  • Description : Ethernet Clock Generator, 10 Clock Outputs IC
  • Series : AD9571
  • Reference Price : USD 4.2
  • Our Price : We have a better price, contact us by email
  • Product Type : Clock Generation & Distribution
  • Function : Clock Generation Devices
  • Current Suggest : Recommended for New Designs
  • Status : Production
  • ROHS Status : ROHS Compliant (Lead Free)
  • Package Type : 40-Lead LFCSP (6mm x 6mm w/ EP)
  • Pins : 40
  • MFG Package Case : CP-40-7
  • Part Type : OTH
  • Standard Packing Type : Tray
  • Standard Packing Quantity : 490
  • Working Temperature : -40 to 85C
  • Other Part Number : AD9571ACPZPEC
  • Shipping methods : DHL FEDEX UPS TNT
  • Delivery Time : Ship within 1 day.
  • Manufacturer Production time : 6-8 weeks (Normally have stocks)
  • Weight : 0.001KG

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Features and Benefits of AD9571ACPZPEC
  • Fully integrated VCO/PLL core
     0.17 ps rms jitter from 1.875 MHz to 20 MHz at 156.25 MHz
     0.41 ps rms jitter from 12 kHz to 20 MHz at 125 MHz
     Input crystal or clock frequency of 25 MHz
  • Preset divide ratios for 156.25 MHz, 33.33 MHz,100 MHz, and 125 MHz
  • Choice of LVPECL or LVDS output format
  • Integrated loop filter
  • 6 copies of reference clock output
  • Rates configured via strapping pins
  • Space saving 6 mm × 6 mm 40-lead LFCSP
  • 0.48 W power dissipation (LVDS operation)
  • See data sheet for additional features
Product Detailed Description for AD9571ACPZPEC
The AD9571 provides a multioutput clock generator function comprising a dedicated PLL core that is optimized for Ethernet line card applications. The integer-N PLL design is based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize network performance. Other applications with demanding phase noise and jitter requirements also benefit from this part.

The PLL section consists of a low noise phase frequency detector (PFD), a precision charge pump (CP), a low phase noise voltage controlled oscillator (VCO), and a preprogrammed feedback divider and output divider. By connecting an external crystal or reference clock to the REFCLK pin, frequencies up to 156.25 MHz can be locked to the input reference.

Each output divider and feedback divider ratio is prepro-grammed for the required output rates. No external loop filter components are required, thus conserving valuable design time and board space.

The AD9571 is available in a 40-lead 6 mm × 6 mm lead frame chip scale package and can be operated from a single 3.3 V supply. The operating temperature range is −40°C to +85°C.

Lifecycle information of AD9571ACPZPEC

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

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