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Manufacturer / Brand: AD
Details: 1100 MHz to 3200 MHz Rx Mixer with Integrated Fractional-N PLL and VCO
Series: ADRF6603
Quantity Available: Over 42330 pieces

Datasheet for ADRF6603:

ADRF6603 datasheet
Price for ADRF6603
Product Parameters
  • Manufacturer Part Number : ADRF6603
  • Manufacturer : AD
  • Description : 1100 MHz to 3200 MHz Rx Mixer with Integrated Fractional-N PLL and VCO
  • Series : ADRF6603
  • Reference Price : USD 0
  • Our Price : We have a better price, contact us by email
  • Product Type : RF Integrated Transmitters, Receivers, & Transceivers
  • Function : RF Mixers with Integrated LO
  • Current Suggest : Not Recommended for New Designs
  • Status : Last Time Buy
  • RoHS Status: -
  • Voltage: -
  • Feature: -
  • Package Case: -
  • Temperature Range: -
  • Packing: Reel/Tray/Tube
  • Standard Packing Quantity: -
  • Country of Origin: -
  • Other Part Number : ADRF6603
  • Shipping methods : DHL FEDEX UPS TNT
  • Delivery Time : Ship within 1 day.
  • Manufacturer Production time : 6-8 weeks (Normally have stocks)
  • Weight : 0.001KG

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Features and Benefits of ADRF6603
  • Rx mixer with integrated
    fractional-N PLL
  • RF input frequency range: 1100 MHz
    to 3200 MHz
  • Internal LO frequency range:
    2100 MHz to 2600 MHz
  • Input P1dB: 14.8 dBm
  • Input IP3: 28.5 dBm
  • IIP3 optimization via external pin
  • SSB noise figure
      IP3SET pin open: 14.3 dB
      IP3SET pin at 3.3 V: 15.6 dB
  • Voltage conversion gain: 6.7 dB
  • Matched 200 Ω IF output impedance
  • IF 3 dB bandwidth: 500 MHz
  • Programmable via 3-wire SPI interface
  • 40-lead, 6 mm × 6 mm LFCSP
Product Detailed Description for ADRF6603

The ADRF6603 is a high dynamic range active mixer with integrated phase-locked loop (PLL) and voltage controlled oscillator (VCO). The PLL/synthesizer uses a fractional-N PLL to generate a fLO input to the mixer. The reference input can be divided or multiplied and then applied to the PLL phase frequency detector (PFD).

The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter.

The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is applied to an LO divider, as well as to a programmable PLL divider. The programmable PLL divider is controlled by a sigma-delta (Σ-Δ) modulator (SDM). The modulus of the SDM can be programmed from 1 to 2047.

The active mixer converts the single-ended 50 Ω RF input to a 200 Ω differential IF output. The IF output can operate up to 500 MHz.

The ADRF6603 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range.

Applications

  • Cellular base stations
Lifecycle information of ADRF6603

This designates products ADI does not recommend broadly for new designs.

ADRF6603 More photos
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