Datasheet for ADRF6612-EVALZ:
- Manufacturer Part Number : ADRF6612-EVALZ
- Manufacturer : AD
- Description : 700 MHz to 3000 MHz Dual Passive Receive Mixer with Integrated PLL and VCO IC
- Series : ADRF6612
- Reference Price : USD 0
- Our Price : We have a better price, contact us by email
- Product Type : RF Integrated Transmitters, Receivers, & Transceivers
- Function : RF Mixers with Integrated LO
- Current Suggest : Not Recommended for New Designs
- Status : Production
- ROHS Status : ROHS Compliant (Lead Free)
- Package Type : Evaluation Board
- Pins : -
- MFG Package Case : -
- Part Type : EVAL
- Standard Packing Type : -
- Standard Packing Quantity : -
- Working Temperature : -
- Other Part Number : ADRF6612-EVALZ
- Shipping methods : DHL FEDEX UPS TNT
- Delivery Time : Ship within 1 day.
- Manufacturer Production time : 6-8 weeks (Normally have stocks)
- Weight : 0.001KG
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The ADRF6612 is a dual radio frequency (RF) mixer andintermediate frequency (IF) amplifier with an integrated phaselockedloop (PLL) and voltage controlled oscillators (VCOs). TheADRF6612 uses revolutionary broadband square wave limitinglocal oscillator (LO) amplifiers to achieve an unprecedented RFbandwidth of 700 MHz to 3000 MHz. Unlike narrow-band sinewave LO amplifier solutions, the LO can be applied above orbelow the RF input over an extremely wide bandwidth. Energystorage elements are not utilized in the LO amplifier, thus dccurrent consumption also decreases with decreasing LOfrequency.
The ADRF6612 utilizes highly linear, doubly balanced passivemixer cores with integrated RF and LO balancing circuits toallow single-ended operation. Integrated RF baluns allow optimalperformance over the 700 MHz to 3000 MHz RF input frequency.The balanced passive mixer arrangement provides outstandingLO to RF and LO to IF leakages, excellent RF to IF isolation,and excellent intermodulation performance over the full RFbandwidth.
The balanced mixer cores provide extremely high inputlinearity, allowing the device to be used in demandingwideband applications where in band blocking signals mayotherwise result in the degradation of dynamic range. Noiseperformance under blocking is comparable to narrow-bandpassive mixer designs. High linearity IF buffer amplifiers followthe passive mixer cores, yielding typical power conversion gainsof 9 dB, and can be matched to a wide range of outputimpedances.
The PLL architecture supports both integer-N and fractional-Noperation and can generate the entire LO frequency range of200 MHz to 2700 MHz using an external reference inputfrequency anywhere in the range of 12 MHz to 320 MHz. Anexternal loop filter provides flexibility in trading off phase noisevs. acquisition time. To reduce fractional spurs in fractional-Nmode, a sigma-delta (Σ-Δ) modulator controls the post-VCOprogrammable divider. The VCO consists of multiple VCO cores.
All features of the ADRF6612 are controlled via a 3-wire SPIresulting in optimum performance and minimum externalcomponents.
The ADRF6612 is fabricated using a BiCMOS, highperformance IC process. The device is available in a 7 mm × 7mm, 48-lead LFCSP package and operates over a −40°C to +85°Ctemperature range. An evaluation board is available.
Applications
- Multiband/multistandard cellular base station diversity receivers
- Wideband radio link diversity downconverters
- Multimode cellular extenders and picocells
This designates products ADI does not recommend broadly for new designs.
