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Manufacturer / Brand: AD
Details: Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
Series: ADRF6655
Quantity Available: Over 39900 pieces

Datasheet for ADRF6655:

ADRF6655 datasheet
Price for ADRF6655
Product Parameters
  • Manufacturer Part Number : ADRF6655
  • Manufacturer : AD
  • Description : Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
  • Series : ADRF6655
  • Reference Price : USD 0
  • Our Price : We have a better price, contact us by email
  • Product Type : RF Integrated Transmitters, Receivers, & Transceivers
  • Function : RF Mixers with Integrated LO
  • Current Suggest : Not Recommended for New Designs
  • Status : Last Time Buy
  • RoHS Status: -
  • Voltage: -
  • Feature: -
  • Package Case: -
  • Temperature Range: -
  • Packing: Reel/Tray/Tube
  • Standard Packing Quantity: -
  • Country of Origin: -
  • Other Part Number : ADRF6655
  • Shipping methods : DHL FEDEX UPS TNT
  • Delivery Time : Ship within 1 day.
  • Manufacturer Production time : 6-8 weeks (Normally have stocks)
  • Weight : 0.001KG

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Features and Benefits of ADRF6655
  • Broadband active mixer with integrated fractional-N PLL
  • RF input frequency range: 100 MHz to 2500 MHz
  • Internal LO frequency range:
    1050 MHz to 2300 MHz
  • Flexible IF output interface
  • Input P1dB: 12 dBm
  • Input IP3: 29 dBm
  • Noise figure (SSB): 12 dB
  • Voltage conversion gain: 6 dB
  • Matched 200 Ω output impedance
  • SPI serial interface for PLL programming
  • 40-lead 6 mm × 6 mm LFCSP
Product Detailed Description for ADRF6655

The ADRF6655 is a high dynamic range active mixer with integrated PLL and VCO. The synthesizer uses a programmable integer-N/fractional-N PLL to generate a local oscillator input to the mixer. The PLL reference input is nominally 20 MHz. The reference input can be divided by or multiplied by and then applied to the PLL phase detector. The PLL can support input reference frequencies from 10 MHz to 160 MHz. The phase detector output controls a charge pump whose output is integrated in an off-chip loop filter. The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is then applied to a local oscillator (LO) divider as well as to a programmable PLL divider.

The programmable divider is controlled by an Σ-Δ modulator (SDM). The modulus of the SDM can be programmed between 1 and 2047.

The broadband, active mixer employs a bias adjustment to allow for enhanced IP3 performance at the expense of increased supply current. The mixer provides an input IP3 exceeding 25 dBm with 12 dB single sideband NF under typical conditions. The IIP3 can be boosted to ~29 dBm with roughly 20 mA of additional supplied current. The mixer provides a typical voltage conversion gain of 6 dB with a 200 Ω differential IF output impedance. The IF output can be externally matched to support upconversion over a limited frequency range.

The ADRF6655 is fabricated using an advanced silicon-germanium BiCMOS process. It is packaged in a 40-lead, exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP. Performance is specified over a −40°C to +85°C temperature range.

Lifecycle information of ADRF6655

This designates products ADI does not recommend broadly for new designs.

ADRF6655 More photos
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